News and Events
| IPClock Expands the Chip on FPGA Product Line by Adding IEEE 1588v2 BC and OC |
IPClock provides its customers with a 1588v2 boundary clock (BC) and Master/Slave ordinary clock on a single chip. |
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| IPClock Offers a New Small Form Factor IEEE1588v2 Master/Slave Standalone Device |
IPClock’s IPC400 opens a new league of low-cost feature reach IEEE1588v2 standalone devices. |
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| IPClock Adds IEEE1588v2 Master/Slave Solution with the First of New Chip on FPGA Devices |
First of New Chip on FPGAs to Provide IPClock’s Customers with Lowest Total Cost of Ownership Implementation of 1588v2 Master/Slave Ordinary Clock. |
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| IPClock Presented 1588 Distributed Master Architecture at the ITSF Conference |
Motti Goren, IPClock's CEO gave a presentation on achieving sub microsecond accuarcy with IEEE1588v2 distributed master architecture at the ITSF conference in Dublin, Ireland. |
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| ZTE Selects IPClock as Partner for IEEE1588v2 in WiMAX Base Stations |
IPClock’s IEEE1588v2 clock synchronization products make GPS redundant in Femto cells and Pico cells |
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IPClock Ltd. is a leading provider of innovative high-quality IEEE1588v2 clock synchronization over packet solutions for legacy and next-generation clock distribution requirements. IPClock’s products are leveraging an innovative clock recovery algorithms suite that provides high immunity to packet switched networks impairments. IPClock’s products are found in a wide variety of applications and networks including Femto and Pico cells, Micro and Macro cellular base stations, supporting UMTS, GSM, CDMA2000 1xEVDO, WiMAX, LTE, backup for GPS, Ethernet Backhauling, GPON, Digital Home, Industrial automation, and E1/T1 over packet. IPClock's product portfolio includes IEEE1588v2 Slave, Master and Transparent Clock as well as clock recovery for CES (SAToP, CESoPSN). |
