The IPC60000 is a low-cost software-based IEEE1588v2 Master.

It is an efficient IEEE1588v2 Master implementation fitting a small industry-standard FPGA with low CPU resources utilization. The IPC60000 architecture provides the flexibility required for supporting both existing and next generation products with minimum changes to the design. It is an application-agnostic, cost effective, reliable, and standard compliant low-cost 1588v2 Master solution for applications in need for reducing total cost of ownership with high-performance clock synchronization and minimum overhead. The IPC60000 is designed for easy field upgrades to support future enhancements as well as future clock synchronization standards.

Typical applications include:

• Cellular Macro/Micro Cells
• Cellular Pico/Femto Cells over Ethernet, DSL, Cable, PON
• Cellular backhauling
• WiMAX Base Stations
• Out-of-band clock synchronization for Pseudowire (E1/T1)
• Backup for GPS

The IPC102E Evaluation Kit allows testing the IPC60000 functionality in your network.