IPClock’s IPC50000 is a full IEEE1588v2 (PTPv2) standard compliant Slave only Ordinary Clock (OC).

Comprised of innovative Sync over Packet Engine (SoPE), state-of-the-art clock synchronization algorithms suite and IEEE1588v2 protocol stack the IPC50000 is requiring low CPU power and low FPGA resources to achieve excellent clock synchronization performance including frequency synchronization, phase and Time of Day (ToD) alignment surmounting stringent packet switched networks (PSN) impairments.

The IPC50000 is an excellent choice for applications requiring synchronization:

• Cellular Macro/Micro Cells
• Cellular Pico/Femto Cells
• Cellular backhauling
• WiMAX Base Stations
• Out-of-band clock synchronization for Pseudowire (E1/T1)
• Backup for GPS

The IPC102E Evaluation Kit allows testing the IPC50000 frequency, phase alignment and time of day synchronization performance in your network.